Mem-Jan 25, 2007
From STDFGroup
STDF Memory Datalog meeting Notes
Date: 25 Jan 2007
Attendees:
Glenn Plowman - Qualcomm
Kochen Liao - Qualcomm
Liang Lai - Mentor Graphics
Sauro Landini - ARM
Ajay Khoche - Verigy
Ping Wen - Yield Dynamics
John Rowe - Teradyne
Sergey shekyan - viragelogic.com
Agenda:
- Review of requirement document
Minutes:
New Member:
- Sergey Shekyan , Virage logic joined the working group
Review of Requirement Document:
- The group review the requirement and usecase documents from Qualcomm and ARM
- The Qualcomm discussions resulted in following observations
- The Qualcomm requirements are coming for the Datapower tool that is used for bitmap analysis.
- Currently the information is stored in the DTR that is parsed twice before being formatted into Datapower input
- Following fields are stored (Pl see the presentation on the web)
- Lot Id
- Wafer Id
- Die Height (Not clear on the purpose of this field)
- Die Width (Not clear on the purpose of this field)
- Wafer Size
- Dimension Units
- Flat Orientation \- (Not clear)
- Positive X Direction (Not clear on the purpose of this field)
- Positive Y Direction (Not clear on the purpose of this field)
- Center X
- Center Y
- X Coordinate
- Y Coordinate
- Test Pattern (E.g. MARCH)
- Test Condition
- Total Error Count
- Failure Bit Address (Logic or Physical) \| Pin Number \| Expected Test Result \| Real Test
- Result
- The expected test result are not needed if fail cycle is stored
- There were some questions that Kochen agreed to get back to the group on in the next meeting.
- The group also review the ARM document's flow.
- A separate bitmapping database is used to store the fail information from ATE that is later converted to target tool. The intermediate database will not be required if standard format is used.
- Bitmapping database contains following elements
- Hardware components (MBIST logic):
- Failing addresses
- Failing bits
- March Element/ Test Element
- Expected values
- Status registers
- Memory information (if memory bitmapping is performed on more then one memory at the same time)
- ATE components (ATE software or third party):
- Memory type
- Memory size
- Memory parameters
- Layout information
- Hardware components (MBIST logic):
Action Items:
- Clarify the question (Kochen)
- Present use case documents ( Liang)
- Prepare starting requirements document (Ajay)
- Get the Inovys proposal and make it available to the group (Ajay)
- Get other important players in the working group e.g. Yield Dynamics (All). Kochen to send the contact information in Yield Dynamics
